High Performance SoC Design Using Magnetic Logic and Memory

Abstract : As the technolody node shrinks down to 90nm and below, high standby power becomes one of the major critical issues for CMOS highspeed computing circuits (e.g. logic and cache memory) due to the high leakage currents. A number of non-volatile storage technologies, such as FRAM, MRAM, PCRAM and RRAM, are under investigation to bring the non-volatility into the logic circuits and then eliminate completely the standby power issue. Thanks to its infinite endurance, high switching/sensing speed and easy integration on top of CMOS process, MRAM is considered as the most promising one. Numerous logic circuits based on MRAM technology have been proposed and prototyped in the last years. In this paper, we present an overview and current status of these logic circuits and discuss their potential applications in the future from both physical and architectural points of view.
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Communication dans un congrès
Salvador Mir; Chi-Ying Tsui; Ricardo Reis; Oliver C. S. Choy. 19th International Conference on Very Large Scale Integration (VLSISOC), Oct 2011, Hong Kong, China. Springer, IFIP Advances in Information and Communication Technology, AICT-379, pp.10-33, 2012, VLSI-SoC: Advanced Research for Systems on Chip. 〈10.1007/978-3-642-32770-4_2〉
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Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, Dafiné Ravelosona, Claude Chappert, et al.. High Performance SoC Design Using Magnetic Logic and Memory. Salvador Mir; Chi-Ying Tsui; Ricardo Reis; Oliver C. S. Choy. 19th International Conference on Very Large Scale Integration (VLSISOC), Oct 2011, Hong Kong, China. Springer, IFIP Advances in Information and Communication Technology, AICT-379, pp.10-33, 2012, VLSI-SoC: Advanced Research for Systems on Chip. 〈10.1007/978-3-642-32770-4_2〉. 〈hal-01519767〉

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