Skip to Main content Skip to Navigation
Conference papers

An Evaluation of Hash Functions on a Power Analysis Resistant Processor Architecture

Abstract : Cryptographic hash functions are an omnipresent component in security-critical software and devices; they support digital signature and data authenticity schemes, mechanisms for key derivation, pseudo-random number generation and so on. A criterion for candidate hash functions in the SHA-3 contest is resistance against side-channel analysis which is a major concern especially for mobile devices. This paper explores the implementation of said candidates on a variant of the Power-Trust platform; our results highlight a flexible solution to power analysis attacks, implying only a modest performance overhead.
Document type :
Conference papers
Complete list of metadata

Cited literature [26 references]  Display  Hide  Download

https://hal.inria.fr/hal-01573303
Contributor : Hal Ifip <>
Submitted on : Wednesday, August 9, 2017 - 10:24:26 AM
Last modification on : Wednesday, August 9, 2017 - 10:25:12 AM

File

978-3-642-21040-2_11_Chapter.p...
Files produced by the author(s)

Licence


Distributed under a Creative Commons Attribution 4.0 International License

Identifiers

Citation

Simon Hoerder, Marcin Wójcik, Stefan Tillich, Daniel Page. An Evaluation of Hash Functions on a Power Analysis Resistant Processor Architecture. 5th Workshop on Information Security Theory and Practices (WISTP), Jun 2011, Heraklion, Crete, Greece. pp.160-174, ⟨10.1007/978-3-642-21040-2_11⟩. ⟨hal-01573303⟩

Share

Metrics

Record views

229

Files downloads

167