An Evaluation of Hash Functions on a Power Analysis Resistant Processor Architecture

Abstract : Cryptographic hash functions are an omnipresent component in security-critical software and devices; they support digital signature and data authenticity schemes, mechanisms for key derivation, pseudo-random number generation and so on. A criterion for candidate hash functions in the SHA-3 contest is resistance against side-channel analysis which is a major concern especially for mobile devices. This paper explores the implementation of said candidates on a variant of the Power-Trust platform; our results highlight a flexible solution to power analysis attacks, implying only a modest performance overhead.
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Claudio A. Ardagna; Jianying Zhou. 5th Workshop on Information Security Theory and Practices (WISTP), Jun 2011, Heraklion, Crete, Greece. Springer, Lecture Notes in Computer Science, LNCS-6633, pp.160-174, 2011, Information Security Theory and Practice. Security and Privacy of Mobile Devices in Wireless Communication. 〈10.1007/978-3-642-21040-2_11〉
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Simon Hoerder, Marcin Wójcik, Stefan Tillich, Daniel Page. An Evaluation of Hash Functions on a Power Analysis Resistant Processor Architecture. Claudio A. Ardagna; Jianying Zhou. 5th Workshop on Information Security Theory and Practices (WISTP), Jun 2011, Heraklion, Crete, Greece. Springer, Lecture Notes in Computer Science, LNCS-6633, pp.160-174, 2011, Information Security Theory and Practice. Security and Privacy of Mobile Devices in Wireless Communication. 〈10.1007/978-3-642-21040-2_11〉. 〈hal-01573303〉

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