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Poster: Fault-Tolerant Multi-Processor Scheduling with Backup Copy Technique

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Abstract

Development of a run-time, self-adaptive scheduling algorithm for Multi-Processor System-on-Chip taking into account faults and thereby treating unreliable system components

Domains

Computer Science [cs] Hardware Architecture [cs.AR]
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Emmanuel Casseau  : Connect in order to contact the contributor

https://hal.inria.fr/hal-01610745

Submitted on : Thursday, October 5, 2017-9:28:52 AM

Last modification on : Friday, August 5, 2022-2:54:52 PM

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Dates and versions

hal-01610745 , version 1 (05-10-2017)

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  • HAL Id : hal-01610745 , version 1

Cite

Petr Dobiáš, Emmanuel Casseau, Oliver Sinnen. Poster: Fault-Tolerant Multi-Processor Scheduling with Backup Copy Technique. Conference on Design and Architectures for Signal and Image Processing (DASIP), Sep 2017, Dresden, Germany. ⟨hal-01610745⟩

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UNIV-RENNES1 CNRS INRIA INSA-RENNES IRISA INRIA2 UR1-MATH-STIC UR1-UFR-ISTIC UNIV-RENNES UR1-MATH-NUM
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