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Optimizing Performance and Energy Overheads Due to Fanout in In-Memory Computing Systems

Abstract : For NOR-NOT based memristor crossbar architectures, we propose a novel approach to address the fanout overhead problem. Instead of copying the logic value as inputs to the driven memristors, we propose that the controller reads the logic value and then applies it in parallel to the driven memristors. We consider two different cases based on the initialization of the memristors to logic-1 at the locations where we want keep the first input memristor of the driven gates. If the memristors are initialized, it falls under case 1, otherwise case 2. In comparison to recently published works, experimental evaluation on ISCAS’85 benchmarks resulted in average performance improvements of 51.08%, 38.66%, and 63.18% for case 1 and 50.94%, 42.08%, and 60.65% for case 2 considering three different mapping scenarios (average, best, and worst). In regards to energy dissipation, we have also obtained average improvements of 91.30%, 88.53%, and 74.04% for case 1 and 86.03%, 78.97%, and 51.89% for case 2 considering the aforementioned scenarios.
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https://hal.inria.fr/hal-02321775
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Submitted on : Monday, October 21, 2019 - 2:55:43 PM
Last modification on : Friday, May 21, 2021 - 6:02:03 PM
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Md Zaman, Rajeev Joshi, Srinivas Katkoori. Optimizing Performance and Energy Overheads Due to Fanout in In-Memory Computing Systems. 26th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2018, Verona, Italy. pp.147-166, ⟨10.1007/978-3-030-23425-6_8⟩. ⟨hal-02321775⟩

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