Abstract : We propose a format of predicate diagrams for the verification of real-time systems. We consider systems that are defined as extended timed graphs, a format that combines timed automata and constructs for modeling data, possibly over infinite domains. Predicate diagrams are succinct and intuitive representations of Boolean abstractions. They also represent an interface between deductive tools used to establish the correctness of an abstraction, and model checking tools that can verify behavioral properties of finite-state models. The contribution of this paper is to extend the format of predicate diagrams to timed systems. We also establish a set of verification conditions that are sufficient to prove that a given predicate diagram is a correct abstraction of an extended timed graph. The formalism is supported by a toolkit, and we demonstrate its use at the hand of Fischer's real-time mutual-exclusion protocol.
Ranko Lazic, Rajagopal Nagarajan, Nikolaos Papanikolaou. The Fifth International Workshop on Automated Verification of Critical Systems 2005 - AVoCS'05, Sep 2005, Coventry/UK, Elsevier, 2005
https://hal.inria.fr/inria-00000631
Contributeur : Eunyoung Kang
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Soumis le : jeudi 10 novembre 2005 - 12:40:13
Dernière modification le : jeudi 11 janvier 2018 - 06:19:52
Document(s) archivé(s) le : vendredi 2 avril 2010 - 18:55:02
Eunyoung Kang, Stephan Merz. Predicate Diagrams for the Verification of Real-Time Systems. Ranko Lazic, Rajagopal Nagarajan, Nikolaos Papanikolaou. The Fifth International Workshop on Automated Verification of Critical Systems 2005 - AVoCS'05, Sep 2005, Coventry/UK, Elsevier, 2005. 〈inria-00000631〉
