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Synthesis of Data-Flow Interfaces for Regular Parallel Programs

Franck Bardoult 1 Patrice Quinton 1 Sanjay Rajopadhye 1 Tanguy Risset 1 
1 COSI - Codesign of Silicon Systems
IRISA - Institut de Recherche en Informatique et Systèmes Aléatoires, INRIA Rennes
Abstract : We present a method for generating an interface between an architecture executing a regular program and a host processor, during an hardware-software co-design process. The interface is generated by static analysis of a single assignment Alfa program and of its scheduling. This method is implement- ed in the MMAlpha design environment, and was experimented on a H261 image coder.
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Reports (Research report)
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Submitted on : Wednesday, May 24, 2006 - 11:14:32 AM
Last modification on : Thursday, October 27, 2022 - 3:45:22 AM
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  • HAL Id : inria-00072902, version 1


Franck Bardoult, Patrice Quinton, Sanjay Rajopadhye, Tanguy Risset. Synthesis of Data-Flow Interfaces for Regular Parallel Programs. [Research Report] RR-3760, INRIA. 1999. ⟨inria-00072902⟩



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