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Using clp(FD) to Support Instruction Schedulers for Multi-issue Pipelined Architectures

Abstract : In the conventional models of pipelined architectures, pipeline conflicts are generally avoided through techniques like reservation tables. They are intended to describe the run time of instructions for which the delays between the execution stage and the fetch one is a constant depending only on the instruction. In fact actual superscalar processors don't comply this model since such delays are context dependent. The proposed approach fully supports slackness in the run time flow of execution. We advocate a model that is based on the concurrency of tasks performed by pipelines rather than the concurrent usage of resources as most current approaches do. The scheduling algorithm is based on the properties of this model. Since most of the constraints can be stated as linear equations or inequations, an implementation using CLP with finite domains is straightforward.
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Submitted on : Wednesday, May 24, 2006 - 1:20:03 PM
Last modification on : Thursday, February 3, 2022 - 11:15:56 AM
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  • HAL Id : inria-00073614, version 1



Annie Despland, Monique Mazaud. Using clp(FD) to Support Instruction Schedulers for Multi-issue Pipelined Architectures. [Research Report] RR-3078, INRIA. 1996. ⟨inria-00073614⟩



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