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I/O and computation overlap on SIMD systolic arrays

Dominique Lavenier 1 Frédéric Raimbault 1 Patrice Frison 1
1 API - Parallel VLSI Architectures
IRISA - Institut de Recherche en Informatique et Systèmes Aléatoires, INRIA Rennes
Abstract : A mechanism for overlapped I/O management operations and computation on a SIMD linear systolic array is presented. This mechanism is based on two synchronized controllers allowing a speedup factor of 2 over SIMD machines without overlapped facility. Code generation is achieved using the C-stolic language, specifically designed for the architecture features of overlapped SIMD systolic arrays.
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https://hal.inria.fr/inria-00074576
Contributor : Rapport de Recherche Inria <>
Submitted on : Wednesday, May 24, 2006 - 3:50:02 PM
Last modification on : Thursday, February 11, 2021 - 2:48:03 PM
Long-term archiving on: : Sunday, April 4, 2010 - 10:20:09 PM

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  • HAL Id : inria-00074576, version 1

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Dominique Lavenier, Frédéric Raimbault, Patrice Frison. I/O and computation overlap on SIMD systolic arrays. [Research Report] RR-2096, INRIA. 1993. ⟨inria-00074576⟩

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