Allocating memory arrays for polyhedra

Doran Wilde 1 Sanjay Rajopadhye 1
1 API - Parallel VLSI Architectures
IRISA - Institut de Recherche en Informatique et Systèmes Aléatoires, INRIA Rennes
Abstract : We have been investigating problems which arise in compiling single assignment labguages (in which memory is not explicitly allocated) into parallel code. Like standard parallelizing compilers, different index space transformations are performed on variables declared over convex polyhedral regions. Polyhedra can be transformed in such a ways as to reduce the volume of the bounding box which we use to reduce the amount of memory allocated to a variable. Allocation of memory to variables which are defined over finite convex polyhedral regions requires a tradeoff in the complexity of the memory addressing function versus the amount of memory used. We present a tradeoff in which the memory address function is limited to an affine function of the indices (thus memory is allocated to a rectangular parallelepiped region). Given this constraint, we seed a unimodular transformation which minimizes the volume of the bounding box of the polyedron. This is a non-linear programming problem. We present a method in which the volume of the bounding box is minimized one dimension at a time by a succession of skewing transformations. Each one of these is a linear programming problem.
Type de document :
[Research Report] RR-2059, INRIA. 1993
Liste complète des métadonnées
Contributeur : Rapport de Recherche Inria <>
Soumis le : mercredi 24 mai 2006 - 15:54:02
Dernière modification le : mercredi 11 avril 2018 - 02:01:17
Document(s) archivé(s) le : lundi 5 avril 2010 - 00:12:21



  • HAL Id : inria-00074613, version 1


Doran Wilde, Sanjay Rajopadhye. Allocating memory arrays for polyhedra. [Research Report] RR-2059, INRIA. 1993. 〈inria-00074613〉



Consultations de la notice


Téléchargements de fichiers