Algorithm engineering and VLSI design

William Marnane 1 Rumen Andonov 2
2 API - Parallel VLSI Architectures
IRISA - Institut de Recherche en Informatique et Systèmes Aléatoires, INRIA Rennes
Abstract : The task of producing a VLSI architecture that will solve a given problem contains many design decisions. The effects of these decisions on the final design are often difficult to quantify. We will compare three different implementations of a systolic architecture for solving the knapsack problem using the dynamic programming method. The design decisions involved and the engineering of the algorithm (altering the algorithm to improve its implementation) are highlighted and their effects on the resulting implementation are discussed. We will also relate the design area and timing to the parameters of the knapsack problem. We derive [??]) as estimations of area and circuit timing complexity of the memory control. We will eliminate the influence of the dominant knapsack parameter (the capacity c) and replace it by the maximum weight [??]. This is of crucial importance for a realistic and efficient VLSI implementation of this problem since in practice [??]2 c.
Type de document :
Rapport
[Research Report] RR-2058, INRIA. 1993
Liste complète des métadonnées

https://hal.inria.fr/inria-00074614
Contributeur : Rapport de Recherche Inria <>
Soumis le : mercredi 24 mai 2006 - 15:54:15
Dernière modification le : mercredi 16 mai 2018 - 11:23:02
Document(s) archivé(s) le : dimanche 4 avril 2010 - 22:20:58

Fichiers

Identifiants

  • HAL Id : inria-00074614, version 1

Citation

William Marnane, Rumen Andonov. Algorithm engineering and VLSI design. [Research Report] RR-2058, INRIA. 1993. 〈inria-00074614〉

Partager

Métriques

Consultations de la notice

338

Téléchargements de fichiers

155