Optimal frequency selection in circuit design for energy minimization

1 TRIO - Real time and interoperability
INRIA Lorraine, LORIA - Laboratoire Lorrain de Recherche en Informatique et ses Applications
Abstract : In this work, we present a quadratic time algorithm using dynamic programming to compute the set of $N$ speeds that a processor should use to minimize its energy consumption while meeting real time constraints. This computation is based on the energy consumption as a function of the clock frequencies and a statistical knowledge of the likelihood of using any frequency in the range from zero to the maximal possible frequency.
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Type de document :
Communication dans un congrès
Proceedings of the 10th International Conference on Real-Time and Embedded Computing Systems and Applications - RTCSA'2004, 2004, Gothenburg/Sweden, pp.437-448, 2004
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https://hal.inria.fr/inria-00099916
Contributeur : Publications Loria <>
Soumis le : mardi 26 septembre 2006 - 10:08:44
Dernière modification le : jeudi 11 janvier 2018 - 06:20:06
Document(s) archivé(s) le : mercredi 29 mars 2017 - 12:45:44

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• HAL Id : inria-00099916, version 1

Citation

Bruno Gaujal, Eric Thierry. Optimal frequency selection in circuit design for energy minimization. Proceedings of the 10th International Conference on Real-Time and Embedded Computing Systems and Applications - RTCSA'2004, 2004, Gothenburg/Sweden, pp.437-448, 2004. 〈inria-00099916〉

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