On-Line Monitoring of Random Number Generators for Embedded Security

Abstract : Many embedded security chips require a high- quality Random Number Generator (RNG). Unfortunately, hard- ware RNG randomness can vary in time due to implementation defects or certain kinds of attacks. To overcome this issue, this paper presents the implementation of a battery of statistical test for randomness. The battery is selected for its efficient imple- mentation, making the area and power consumption insignificant. Performance and cost of the hardware implementation are given for FPGA and VLSI targets. Results show that statistical tests can easily be implemented in low-cost embedded security circuits and can enhance on-line monitoring of RNG randomness to prevent RNG failures.
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Communication dans un congrès
IEEE International Symposium on Circuits and Systems, ISCAS 2009, May 2009, Taipei, Taiwan. 2009, 〈10.1109/ISCAS.2009.5118446〉
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Dernière modification le : mercredi 11 avril 2018 - 01:56:54
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Renaud Santoro, Olivier Sentieys, Sébastien Roy. On-Line Monitoring of Random Number Generators for Embedded Security. IEEE International Symposium on Circuits and Systems, ISCAS 2009, May 2009, Taipei, Taiwan. 2009, 〈10.1109/ISCAS.2009.5118446〉. 〈inria-00446036〉

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