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Formal Modeling of Embedded Systems with Explicit Schedules and Routes

Julien Boucaron 1 Anthony Coadou 1 Robert de Simone 1
1 AOSTE - Models and methods of analysis and optimization for systems with real-time and embedding constraints
CRISAM - Inria Sophia Antipolis - Méditerranée , Inria Paris-Rocquencourt, Laboratoire I3S - COMRED - COMmunications, Réseaux, systèmes Embarqués et Distribués
Abstract : A main goal of compilation is to efficiently map application programs onto architectural execution platforms, while hiding the details of the latter to the programmer through high-level programming languages. Of course this is only feasible inside a certain range of constructs, and the judicious design of sequential programming languages and computer architectures that match one another has been a decadeslong process. Now the advent of multicore processors brings radical changes to this topic, bringing forth concurrency as a key element in efficiency, both for application design and architecture computing power. The shift is mostly prompted by technological factors, namely the ability to cram several processors on a single chip, and the diminishing gains of Instruction Level Parallelism techniques used in former architectures. Still, the definition of high-level programming (and more generally, application design) formalisms matching the new era is a largely unsolved issue.
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Submitted on : Monday, June 28, 2010 - 2:50:21 PM
Last modification on : Tuesday, January 11, 2022 - 11:16:21 AM


  • HAL Id : inria-00495667, version 1



Julien Boucaron, Anthony Coadou, Robert de Simone. Formal Modeling of Embedded Systems with Explicit Schedules and Routes. Sandeep K. Shukla and Jean-Pierre Talpin. Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, Springer Science+Business Media, LLC 2010, pp.38, 2010, 978-1-4419-6399-4. ⟨inria-00495667⟩



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