Frame latency evaluation: when simulation and analysis alone are not enough

Nicolas Navet 1 Aurélien Monot 1, 2 Jörn Migge 3
1 TRIO - Real time and interoperability
INRIA Lorraine, LORIA - Laboratoire Lorrain de Recherche en Informatique et ses Applications
Abstract : This talk is about temporal verification in real-time communication systems. Early in the design cycle, the two main approaches for verifying timing constraints and dimensioning the networks are worst-case schedulability analysis and simulation. The aim of the talk is to demonstrate that both provide complementary results and that, most often, none of them alone is sufficient. In particular, it will be shown that response time distributions that can be derived from simulations cannot replace worst-case analysis. This will be done on automotive case-studies using analysis and simulation software tools.
Type de document :
Communication dans un congrès
8th IEEE International Workshop on Factory Communication Systems (WFCS2010), industry day, May 2010, Nancy, France. 2010
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https://hal.inria.fr/inria-00551506
Contributeur : Nicolas Navet <>
Soumis le : lundi 3 janvier 2011 - 22:13:17
Dernière modification le : jeudi 11 janvier 2018 - 06:20:05

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  • HAL Id : inria-00551506, version 1

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Nicolas Navet, Aurélien Monot, Jörn Migge. Frame latency evaluation: when simulation and analysis alone are not enough. 8th IEEE International Workshop on Factory Communication Systems (WFCS2010), industry day, May 2010, Nancy, France. 2010. 〈inria-00551506〉

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