Software Pipelining and Register Pressure in VLIW Architectures: Preconditionning Data Dependence Graphs is Experimentally Better Than Lifetime-Sensitive Scheduling

Frédéric Brault 1, 2, 3 Benoît Dupont-De-Dinechin 2 Sid Touati 1, 3 Albert Cohen 1
1 ALCHEMY - Architectures, Languages and Compilers to Harness the End of Moore Years
LRI - Laboratoire de Recherche en Informatique, UP11 - Université Paris-Sud - Paris 11, Inria Saclay - Ile de France, CNRS - Centre National de la Recherche Scientifique : UMR8623
Abstract : Embedding register-pressure control in software pipelining heuristics is the dominant approach in modern back-end compilers. However, aggressive attempts at combining resource and register constraints in software pipelining have failed to scale to real-life loops, leaving weaker heuristics as the only practical solutions. We propose a decoupled approach where register pressure is controlled before scheduling, and evaluate its effectiveness in combination with three representative software pipelining algorithms. We present conclusive experiments in a production compiler on a wealth of media processing and general purpose benchmarks.
Type de document :
Communication dans un congrès
8th Workshop on Optimizations for DSP and Embedded Systems (ODES'10), Apr 2010, Toronto, Canada. 2010
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https://hal.inria.fr/inria-00551515
Contributeur : Albert Cohen <>
Soumis le : mardi 4 janvier 2011 - 00:32:23
Dernière modification le : jeudi 5 avril 2018 - 12:30:12
Document(s) archivé(s) le : lundi 5 novembre 2012 - 15:16:16

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  • HAL Id : inria-00551515, version 1

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Frédéric Brault, Benoît Dupont-De-Dinechin, Sid Touati, Albert Cohen. Software Pipelining and Register Pressure in VLIW Architectures: Preconditionning Data Dependence Graphs is Experimentally Better Than Lifetime-Sensitive Scheduling. 8th Workshop on Optimizations for DSP and Embedded Systems (ODES'10), Apr 2010, Toronto, Canada. 2010. 〈inria-00551515〉

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