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A Coarse-Grain Reconfigurable Hardware Architecture for RVC-CAL-based Design

Cécile Beaumin 1 Emmanuel Casseau 1 Olivier Sentieys 1 Arnaud Carer 1
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
Inria Rennes – Bretagne Atlantique , IRISA-D3 - ARCHITECTURE
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Conference papers
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https://hal.inria.fr/inria-00554250
Contributor : Emmanuel Casseau Connect in order to contact the contributor
Submitted on : Monday, January 10, 2011 - 3:19:57 PM
Last modification on : Thursday, January 20, 2022 - 5:33:30 PM

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  • HAL Id : inria-00554250, version 1

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CNRS | INRIA | UNIV-RENNES1 | IRISA | IRISA-D3 | UR1-MATH-STIC | UR1-UFR-ISTIC | UNIV-RENNES | INSTITUT-TELECOM | INSA-RENNES | EC-PARIS | UR1-MATH-NUM

Citation

Cécile Beaumin, Emmanuel Casseau, Olivier Sentieys, Arnaud Carer. A Coarse-Grain Reconfigurable Hardware Architecture for RVC-CAL-based Design. Design and Architectures for Signal and Image Processing, Oct 2010, Edinburgh, United Kingdom. ⟨inria-00554250⟩

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