Wakeup Time and Wakeup Energy Estimation in Power-Gated Logic Clusters

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https://hal.inria.fr/inria-00554470
Contributor : Olivier Sentieys <>
Submitted on : Monday, January 10, 2011 - 9:52:44 PM
Last modification on : Friday, November 16, 2018 - 1:40:24 AM

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  • HAL Id : inria-00554470, version 1

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Vivek Tovinakere Dwarakanath, Olivier Sentieys, Steven Derrien. Wakeup Time and Wakeup Energy Estimation in Power-Gated Logic Clusters. 24th International Conference on VLSI Design, Jan 2011, Chennai, India. ⟨inria-00554470⟩

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