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Model Driven Scheduling Framework for Multiprocessor SoC Design

Ashish Meena 1, 2 Pierre Boulet 1, 2, * 
* Corresponding author
2 DART - Contributions of the Data parallelism to real time
LIFL - Laboratoire d'Informatique Fondamentale de Lille, Inria Lille - Nord Europe
Abstract : The evolution of technologies is enabling the integration of complex platforms in a single chip, called a System-on-Chip (SoC). Mod- ern SoCs may include several CPU subsystems to execute software and sophisticated interconnect in addition to specific hardware subsystems. Designing such mixed hardware and software systems requires new me- thodologies and tools or to enhance old tools. These design to ols must be able to satisfy many relative trade-offs (real-time, performance, low power consumption, time to market, re-usability, cost, area, etc). It is recognized that the decisions taken for scheduling and mapping at a high level of abstraction have a major impact on the global design flow. They can help in satisfying different trade-offs before proceeding to lower level refinements. par To provide good potential to scheduling and mapping decisions we pro- pose in this paper a static scheduling framework for MpSoC design. We will show why it is necessary to and how to integrate different schedul- ing techniques in such a framework in order to compare and to combine them. This framework is integrated in a model driven approach in order to keep it open and extensible.
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Submitted on : Friday, February 11, 2011 - 10:38:04 AM
Last modification on : Wednesday, March 9, 2022 - 12:08:06 PM


  • HAL Id : inria-00565169, version 1



Ashish Meena, Pierre Boulet. Model Driven Scheduling Framework for Multiprocessor SoC Design. Workshop on Scheduling for Parallel Computing (SPC 2005), 2005, Poznan, Poland. ⟨inria-00565169⟩



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