The case for Globally Irregular Locally Regular Algorithm Architecture Adequation

Pierre Boulet 1, 2, * Ashish Meena 1, 2
* Auteur correspondant
2 DART - Contributions of the Data parallelism to real time
LIFL - Laboratoire d'Informatique Fondamentale de Lille, Inria Lille - Nord Europe
Abstract : In modern embedded systems, parallelism is a good way to reduce power consumption while respecting the real-time constraints. To achieve this, one needs to efficiently exploit the potential parallelism of the application and of the architecture. We propose in this paper a hybrid optimization method to improve the handling of repetitions in both the algorithm and the architecture. The approach is called Globally Irregular Locally Regular and consists in combining irregular heuristics and regular ones to take advantage of the strong points of both.
Type de document :
Communication dans un congrès
Journées Francophones sur l'Adéquation Algorithme Architecture (JFAAA'05), 2005, Dijon, France. 2005
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https://hal.inria.fr/inria-00565175
Contributeur : Pierre Boulet <>
Soumis le : vendredi 11 février 2011 - 10:39:00
Dernière modification le : jeudi 11 janvier 2018 - 06:22:13

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  • HAL Id : inria-00565175, version 1

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Pierre Boulet, Ashish Meena. The case for Globally Irregular Locally Regular Algorithm Architecture Adequation. Journées Francophones sur l'Adéquation Algorithme Architecture (JFAAA'05), 2005, Dijon, France. 2005. 〈inria-00565175〉

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