Configuration logics have been proposed for the specification of architectural styles of component-based systems. We use such a logic for the specification and verification of architectural properties of dynamic reconfigurable systems. In particular, we introduce the Temporal Configuration Logic (TCL), a linear time temporal logic built from atomic formulas characterizing system configurations and temporal modalities. We study an effective model-checking procedure based on SMT techniques for a non-trivial fragment of TCL which has been implemented in a prototype runtime verification tool. We provide preliminary experimental results illustrating the capabilities of the tool on two non-trivial benchmark systems.