Reservation tables are used at various levels in embedded systems design to represent the allocation of resources in cyclic computations. They model system-level static realtime task schedules in fields like automotive or avionics, but also model the cycle-accurate ordering of instructions at microarchitectural level, as used in software pipelining. To optimize system throughput, successive execution cycles can be pipelined, subject to resource constraints and intercycle data dependencies. In this paper we take inspiration from software pipelining and predicate-aware scheduling to define system-level pipelining techniques for task schedules given under the form of reservation tables. Our algorithms start from predicated reservation tables output by state-of-the-art latency-optimizing embedded design tools. They significantly optimize system throughput while maintaining the required strictly periodic execution model and the end-to-end latency guarantees of the input reservation table. We demonstrate the approach on real-life scheduling problems.