Reservation tables are used at various levels in embedded systems design to represent the allocation of resources in cyclic computations. They model system-level static real-time task schedules in fields like automotive or avionics, but also model the cycle-accurate ordering of instructions at microarchitectural level, as used in software pipelining. To optimize system throughput, successive execution cycles can be pipelined, subject to resource constraints and inter-cycle data dependencies. In this paper we take inspiration from software pipelining to define system-level pipelining techniques for static task schedules given under the form of scheduling/reservation tables. We allow the use of conditional tables where each operation can be guarded (predicated). Our algorithms optimize system throughput while maintaining the end-to-end latency guarantees defined by the input scheduling table. We demonstrate the approach on real-life examples of task scheduling problems.