GeCoS: A framework for prototyping custom hardware design flows

Abstract : GeCoS is an open source framework that provide a highly productive environment for hardware design. GeCoS primarily targets custom hardware design using High Level Synthesis, distinguishing itself from classical compiler infrastructures. Compiling for custom hardware makes use of domain specific semantics that are not considered by general purpose compilers. Finding the right balance between various performance criteria, such as area, speed, and accuracy, is the goal, contrary to the typical goal in high performance context to maximize speed. The GeCoS infrastructure facilitates the prototyping of hardware design flows, going beyond compiler analyses and transformations. Hardware designers must interact with the compiler for design space exploration, and it is important to be able to give instant feedback to the users.
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Communication dans un congrès
Adams, Bram and Rilling, Juergen and Khomh, Foutse. 13th IEEE International Working Conference on Source Code Analysis and Manipulation (SCAM), Sep 2013, Eindhoven, Netherlands. IEEE, pp.100-105, 2013, 〈10.1109/SCAM.2013.6648190〉
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https://hal.inria.fr/hal-00921370
Contributeur : François Charot <>
Soumis le : vendredi 20 décembre 2013 - 11:54:58
Dernière modification le : mardi 16 janvier 2018 - 15:54:24

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Antoine Floch, Tomofumi Yuki, Ali El-Moussawi, Antoine Morvan, Kevin Martin, et al.. GeCoS: A framework for prototyping custom hardware design flows. Adams, Bram and Rilling, Juergen and Khomh, Foutse. 13th IEEE International Working Conference on Source Code Analysis and Manipulation (SCAM), Sep 2013, Eindhoven, Netherlands. IEEE, pp.100-105, 2013, 〈10.1109/SCAM.2013.6648190〉. 〈hal-00921370〉

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