GeCoS: A framework for prototyping custom hardware design flows

Antoine Floch 1 Tomofumi Yuki 2 Ali El-Moussawi 2 Antoine Morvan 2 Kevin Martin 3 Maxime Naullet 2 Mythri Alle 2 Ludovic l'Hours 4 Nicolas Simon 2 Steven Derrien 2 François Charot 2 Christophe Wolinski 2 Olivier Sentieys 2
1 Tocea, Inc [Rennes]
2 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
IRISA-D3 - ARCHITECTURE, Inria Rennes – Bretagne Atlantique
3 Lab-STICC_UBS_CACS_MOCS
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
4 INSA Lyon - Institut National des Sciences Appliquées de Lyon
Abstract : GeCoS is an open source framework that provide a highly productive environment for hardware design. GeCoS primarily targets custom hardware design using High Level Synthesis, distinguishing itself from classical compiler infrastructures. Compiling for custom hardware makes use of domain specific semantics that are not considered by general purpose compilers. Finding the right balance between various performance criteria, such as area, speed, and accuracy, is the goal, contrary to the typical goal in high performance context to maximize speed. The GeCoS infrastructure facilitates the prototyping of hardware design flows, going beyond compiler analyses and transformations. Hardware designers must interact with the compiler for design space exploration, and it is important to be able to give instant feedback to the users.
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Conference papers
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https://hal.inria.fr/hal-00921370
Contributor : François Charot <>
Submitted on : Friday, December 20, 2013 - 11:54:58 AM
Last modification on : Wednesday, December 18, 2019 - 5:04:41 PM

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Antoine Floch, Tomofumi Yuki, Ali El-Moussawi, Antoine Morvan, Kevin Martin, et al.. GeCoS: A framework for prototyping custom hardware design flows. 13th IEEE International Working Conference on Source Code Analysis and Manipulation (SCAM), Sep 2013, Eindhoven, Netherlands. pp.100-105, ⟨10.1109/SCAM.2013.6648190⟩. ⟨hal-00921370⟩

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