Reconfigurable Circuits Using Magnetic Tunneling Junction Memories

Abstract : This paper presents the first results of our work to research and develop new reconfigurable circuits and topologies based on Magnetic RAM (MRAM) memory elements. This work proposes a coarse-grained reconfigurable array using MRAM. A coarse-grained array, where each reconfigurable element computes on 4-bit or larger input words, is more suitable to execute data-oriented algorithms and is more able to exploit large amounts of operation-level parallelism than common fine-grained architectures. The architecture is organized as a one-dimensional array of programmable ALU and the configuration bits are stored in MRAM. MRAM provide non-volatility with cell areas and with access speeds comparable to those of SRAM and with lower process complexity than FLASH memory. MRAM can also be efficiently organized as multi-context memories.
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Communication dans un congrès
Luis M. Camarinha-Matos; Pedro Pereira; Luis Ribeiro. First IFIP WG 5.5/SOCOLNET Doctoral Conference on Computing, Electrical and Industrial Systems (DoCEIS), Feb 2010, Costa de Caparica, Portugal. Springer, IFIP Advances in Information and Communication Technology, AICT-314, pp.548-556, 2010, Emerging Trends in Technological Innovation. 〈10.1007/978-3-642-11628-5_61〉
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Victor Silva, Jorge Fernandes, Horácio Neto. Reconfigurable Circuits Using Magnetic Tunneling Junction Memories. Luis M. Camarinha-Matos; Pedro Pereira; Luis Ribeiro. First IFIP WG 5.5/SOCOLNET Doctoral Conference on Computing, Electrical and Industrial Systems (DoCEIS), Feb 2010, Costa de Caparica, Portugal. Springer, IFIP Advances in Information and Communication Technology, AICT-314, pp.548-556, 2010, Emerging Trends in Technological Innovation. 〈10.1007/978-3-642-11628-5_61〉. 〈hal-01060781〉

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