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UML MARTE Time Model and Its Clock Constraint Specification Language
Abstract : The UML Profile for MARTE extends the UML with constructs dedicated to the modeling and analysis
of real-time and embedded systems. Its time profile provides a rich model of time based on the notion
of logical clocks that can be used consistently through all modeling elements/diagrams. The MARTE
time profile comes with a companion language, called CCSL. CCSL is a formal declarative language
used to handle the MARTE logical clocks and schedule the execution of the different parts of a model.
This chapter gives a snapshot on modeling and analysis facilities that have been developed specifically
around the time profile of MARTE and CCSL. A second objective is to show how MARTE can be combined
with other profiles such as EAST-ADL. The last objective is the use of CCSL as a common language
for specifying the semantics of models to allow their execution in a common framework. The MARTE
and EAST-ADL constructs are illustrated on an example of a simplified cruise control. The example
starts with a description of functional and timing requirements captured using a specific profile called
EAST-ADL dedicated to the automotive domain. Then some of the requirements are refined with UML
state machines and activities adorned with MARTE stereotypes. All these models rely on MARTE clocks.
The semantics of these diagrams is given by a CCSL description that is automatically derived from the
models. The resulting CCSL specification can be used to execute the UML/EAST-ADL specification, to
animate the model, or to perform various kinds of analyses.
https://hal.inria.fr/hal-01079039
Contributor : Team Kairos <>
Submitted on : Friday, October 31, 2014 - 8:55:09 AM
Last modification on : Monday, January 4, 2021 - 7:08:03 PM
Contributor : Team Kairos <>
Submitted on : Friday, October 31, 2014 - 8:55:09 AM
Last modification on : Monday, January 4, 2021 - 7:08:03 PM
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