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Architectural Support for Software-Defined Metadata Processing

Abstract : Hardware for propagating and checking software-programmable metadata tags can achieve low runtime overhead when carefully implemented. We generalize prior work on hardware tagging by considering a generic architecture that supports software-defined policies over metadata of arbitrary size and complexity; we introduce several novel microarchitectural optimizations that keep the overhead of this rich processing low. Our model thus achieves the efficiency of previous hardware-based approaches with the flexibility of the software-based ones. We demonstrate this by using it to enforce four diverse safety and security policies---spatial and temporal memory safety, taint tracking, control-flow integrity, and code and data separation---plus a composite policy that enforces all of them simultaneously. Experiments on SPEC CPU2006 benchmarks show modest impact on runtime (typically under 10%) and power ceiling (less than 10%), in return for some increase in energy usage (typically under 60%) and area for on-chip memory structures (110%).
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https://hal.inria.fr/hal-01102378
Contributor : Bruno Blanchet <>
Submitted on : Monday, January 12, 2015 - 4:20:26 PM
Last modification on : Thursday, March 5, 2020 - 4:48:29 PM

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Udit Dhawan, Cătălin Hriţcu, Rafi Rubin, Nikos Vasilakis, Silviu Chiricescu, et al.. Architectural Support for Software-Defined Metadata Processing. 20th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2015), Mar 2015, Istanbul, Turkey. pp.487-502, ⟨10.1145/2694344.2694383⟩. ⟨hal-01102378⟩

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