High Level Loop Transformations for Systematic Signal Processing Embedded Applications

Calin Glitia 1, 2 Pierre Boulet 1, 2
2 DART - Contributions of the Data parallelism to real time
LIFL - Laboratoire d'Informatique Fondamentale de Lille, Inria Lille - Nord Europe
Abstract : Array-OL specification model is a mixed graphical-textual language designed especially to model multidimensional intensive signal processing applications. Data and Task parallelism are specified directly in the model. High level transformations are defined on this model, allowing the refactoring of an application and furthermore providing directions for optimization. The resemblances with the wide-known and used loop transformations lead us to try taking concepts and results from this domain and see how they fit in Array-OL context. We try to identify the links between these two domains and also future directions for Array-OL, optimization techniques especially.
Type de document :
[Research Report] RR-6469, INRIA. 2008, pp.27
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Soumis le : mardi 11 mars 2008 - 13:33:13
Dernière modification le : jeudi 11 janvier 2018 - 06:22:13
Document(s) archivé(s) le : vendredi 25 novembre 2016 - 22:59:03


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  • HAL Id : inria-00262023, version 2



Calin Glitia, Pierre Boulet. High Level Loop Transformations for Systematic Signal Processing Embedded Applications. [Research Report] RR-6469, INRIA. 2008, pp.27. 〈inria-00262023v2〉



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