Towards Automatic Accuracy Validation and Optimization of Fixed-Point Hardware Descriptions in SystemC

Arnaud Tisserand

Communication Dans Un Congrès Année : 2010

Towards Automatic Accuracy Validation and Optimization of Fixed-Point Hardware Descriptions in SystemC

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Arnaud Tisserand

Fonction : Auteur
PersonId : 3616
IdHAL : arnaud-tisserand
ORCID : 0000-0001-7042-3541
IdRef : 060154160

Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources

Mots clés

computer arithmetic fixed-point arithmetic operator accuracy rounding error integrated circuit hardware description language

Domaines

Arithmétique des ordinateurs Micro et nanotechnologies/Microélectronique

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https://inria.hal.science/inria-00536554

Soumis le : mardi 16 novembre 2010-14:07:16

Dernière modification le : vendredi 24 mars 2023-14:52:53

Dates et versions

inria-00536554 , version 1 (16-11-2010)

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HAL Id : inria-00536554 , version 1

Citer

Arnaud Tisserand. Towards Automatic Accuracy Validation and Optimization of Fixed-Point Hardware Descriptions in SystemC. 14th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics (SCAN), Sep 2010, Lyon, France. ⟨inria-00536554⟩

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Towards Automatic Accuracy Validation and Optimization of Fixed-Point Hardware Descriptions in SystemC

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