Modeling of Interconnection Networks in Massively Parallel Processor Architectures - Inria - Institut national de recherche en sciences et technologies du numérique Access content directly
Conference Papers Year : 2007
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inria-00536724 , version 1 (16-11-2010)

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  • HAL Id : inria-00536724 , version 1

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Alexey Kupriyanov, Frank Hannig, Dmitrij Kissler, Jürgen Teich, Julien Lallet, et al.. Modeling of Interconnection Networks in Massively Parallel Processor Architectures. International Conference on Architecture of Computing Systems, 2007, Zurich, Switzerland. ⟨inria-00536724⟩
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