Skip to Main content Skip to Navigation
Conference papers

Data and Thread Placement in NUMA Architectures: A Statistical Learning Approach

Abstract : Nowadays, NUMA architectures are common in compute-intensive systems. Achieving high performance for multi-threaded application requires both a careful placement of threads on computing units and a thorough allocation of data in memory. Finding such a placement is a hard problem to solve, because performance depends on complex interactions in several layers of the memory hierarchy. In this paper we propose a black-box approach to decide if an application execution time can be impacted by the placement of its threads and data, and in such a case, to choose the best placement strategy to adopt. We show that it is possible to reach near-optimal placement policy selection. Furthermore, solutions work across several recent processor architectures and decisions can be taken with a single run of low overhead profiling.
Complete list of metadata

Cited literature [32 references]  Display  Hide  Download
Contributor : Brice Goglin Connect in order to contact the contributor
Submitted on : Tuesday, July 30, 2019 - 11:10:07 AM
Last modification on : Tuesday, January 4, 2022 - 6:17:04 AM


Files produced by the author(s)



Nicolas Denoyelle, Brice Goglin, Emmanuel Jeannot, Thomas Ropars. Data and Thread Placement in NUMA Architectures: A Statistical Learning Approach. ICPP 2019 - 48th International Conference on Parallel Processing, Aug 2019, Kyoto, Japan. pp.1-10, ⟨10.1145/3337821.3337893⟩. ⟨hal-02135545v3⟩



Les métriques sont temporairement indisponibles